PARALLEL SESSION
B2L-E
High Performance Electrical and Optical Front End Design for Wireline Session
SALA TURINA
WEDNESDAY - 9 September | 13:50 - 15:30
CHAIRS
Declan Carey, Bart Moeneclaey
SESSION PROGRAM
13:50 - 14:10
A Second-Order IIR-DFE for a Bandwidth-Limited TIA in a 0.43-pJ/b 8×25-Gb/s/λ Optical Receiver
Mahdi Zabihpour, Kelly Hunter, Eugene Zailer, Ali Sheikholeslami
14:10 - 14:30
A 224-Gb/s Linear TIA in 28-nm CMOS Co-Packaged with SiPh Photodiode
Jianyu Yang, Feiyang Zhang, Ruixuan Yang, Wenxin Zhang, Tonghui Wang, Liang Zhao, Zetong Zhang, Wei Liu, Li Geng, Dan...
14:30 - 14:50
A Dual-Mode 45-Gb/s NRZ and 58-Gb/s PAM-4 Bandwidth Efficient VCSEL Transmitter with Hybrid Equalization in 28-nm CMOS
Jun-Seo Kim, Kihun Kim, Dae-Won Rho, Jae-Koo Park, Woo-Young Choi
14:50 - 15:10
258-GS/s Analog Demultiplexer with Pnp SiGe HBTs on the Data Path
Truman Jian, Peter Schvan, Sorin Voinigescu
15:10 - 15:30
A 12-Gb/s Broadcast Video Retimer Equalizing 53+dB Coax at a BER < 1e–12 Without FEC
Abishek Manian, Yongseon Koh, Robin Gupta, Amit Rane, Ashkan Roshan Zamir, Mike Vrazel, Chris Yim, Pakyiu Leung, Stev...