09:30 – 10:00

NEGF Simulations in the Industrial Setting: From Quantum Transport to Technology Enablement

Alfonso Sanchez-Soares (TouCAD Ltd, IE)

As device dimensions, material stacks, and operating regimes continue to push beyond the limits of semiclassical transport models, the non-equilibrium Green’s function (NEGF) formalism is becoming increasingly relevant not only for exploratory research, but also for practical industrial TCAD workflows. This talk will discuss what it takes to bring NEGF simulations to industrial settings, moving beyond research-level development toward a practical technology that can support device engineering decisions. Emphasis will be placed on how quantum-transport simulations can support the analysis and design of advanced nanoscale devices, while also providing a physically grounded basis for parameterising semiclassical transport models within multiscale simulation workflows. The presentation will also address the gap between advanced methods and product-ready software, highlighting challenges in usability, calibration, automation, and deployment, and arguing that industrial-grade NEGF tools can become a key enabler for next-generation device design in the near future.

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10:00 – 10:30

AI Models for Sensor Meta Surfaces

Denis Rideau (ST Microelectronics, FR)

Designing large-scale optical meta-surfaces remains a major computational challenge due to the complex electromagnetic interactions arising from subwavelength nanostructures. While meta-surfaces offer a powerful route toward ultra-thin, high-performance optical components, their design at millimeter scale is often impractical with conventional finite-difference time-domain (FDTD) simulations because of the associated computational cost.  This tutorial introduces an AI-driven design framework that leverages convolutional neural network emulators to accelerate and improve meta-surface development. Neural network enables fast surrogate modeling of electromagnetic responses while preserving the fidelity needed to capture complex interactions beyond local approximations. By integrating these emulators with gradient-based optimization and generative design strategies, the framework supports efficient exploration of large design spaces and scalable inverse design of millimeter-scale meta-surface optics. The tutorial highlights how neural network technologies can significantly reduce simulation time, improve design accuracy, and unlock new opportunities for scalable, high-performance meta-surface engineering.

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10:30 – 11:00

Interactively Controllable Surrogate Modeling for Fab Technology Co-Optimization

Stephania Carapezzi (Silvaco, US)

Physics-based design flow has been a key driver of the semiconductor industry for many years, developed primarily by expert users through an iterative trial-and-error process. However, rapid technology scaling has increased fab process and device-design complexity, expanding the optimization space to a scale that is increasingly difficult to explore efficiently. Nowadays, Machine learning (ML) and artificial intelligence (AI) are emerging as essential technical enhancements to conventional design flows. In this talk, I will discuss the use of surrogate modelling in the context of AI-powered platform Fab Technology Co-Optimization (FTCO™). FTCO addresses the bottlenecks of advanced semiconductor development including exponential parameter complexity, multi-week calibration cycles, and siloed decision-making through the building of deployable surrogate models. By combining physical simulation with smart Design-of-Experiments and AI-powered calibration, optimization and analysis, FTCO heavily relies on surrogate models to maximize design space exploration while hiding underlying complexity behind an intuitive, interactive interface. The use of physics-based surrogate models helps also to remove barriers to entry for non-simulation engineers by making physics-based modelling accessible through fast, user-friendly predictive tools, allowing simulation to have a greater impact throughout an organization. Engineers across simulation, fab integration, and technology teams gain immediate sensitivity insight, robust process window definition, and accelerated multi-objective optimization—ultimately compressing time-to-market and improving yield confidence for next-generation semiconductor technologies.

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11:00 - 11:30

Coffee break

 

11:30 – 12:00

How Does Flash Memory Actually Work? Understanding Charge‑Trap 3D NAND Operation Through Modeling.

Devin Verreck (imec, BE)

3D NAND flash is the most common non-volatile memory technology today, yet its memory operation is still not fully understood. In this workshop, we present a modeling framework that provides physical insight into incremental step pulse programming (ISPP) in charge‑trap-layer flash cells. We first discuss a physics‑based TCAD model that explicitly accounts for carrier energy relaxation during high‑field injection, resolving discrepancies between simulations and experimental characteristics. Next, we introduce a complementary semianalytical model that captures the balance between charge injection, trapping, and escape with significantly reduced computational complexity. Together, these models are used to identify and explain the distinct regimes of the ISPP curve and to understand the physical factors that govern programming efficiency in advanced 3D NAND devices.

 

12:00 – 12:30

Challenges for Drift-Diffusion Modeling at Cryogenic Temperatures: Numerics, Stabilization, Freeze-out, Band Tailing and Traps

Christoph Jungemann (RWTH Aachen, DE)

Quantum computers and other applications require CMOS devices operated at 4K and below. Drift-Diffusion simulations at these temperatures are very challenging for various reasons beyond numerical under- and overflow. The electron gas is degenerate, and the Scharfetter-Gummel stabilization must be replaced either by an approximation or by a numerical solution of the corresponding ODE. We have developed a public-domain software package that provides a numerically exact and stable solution of the ODE and can handle arbitrary density-of-states including band tailing. Freeze-out of dopants requires detailed modeling of the related generation/recombination rates including the Poole-Frenkel effect and tunneling. Electron transport in the channel is much more complex than at room temperature due to the stronger impact of interface traps, band tailing etc. leading to hopping and tunneling-assisted transport near threshold, and thus complex models for the drift mobility are required. Due to these detrimental effects standard measurement techniques to determine parameters of MOS devices do not work or require extensive simulations to extract the parameters. For example, an AC amplitude of 50mV applied to the gate results at room temperature in a linear response, which can be handled by small-signal analysis.  At 4K, on the other hand, the response is strongly nonlinear requiring a transient or harmonics-balance simulation to extract the fundamental signal. Furthermore, simple 1D devices structures (e.g. MOS caps) do not work due to freeze-out, and 2D or 3D effects cannot be neglected. We have therefore developed a 3D drift-diffusion model that is numerically stable at 4K under stationary, small-signal and transient conditions. Simulations at 4K reveal transients at time scales which are much larger than at room temperature.

 

12:30 – 13:00

Design-Technology Co-Optimization: physical accuracy that scales to the circuit level

Franz Schanovsky (Global TCAD Solutions, AT)

Design-Technology Co-Optimization (DTCO) is mission-critical for advancing modern semiconductor nodes. The simulation workflows used in DTCO strive to combine high physical accuracy with a turn-around-time (TAT) that makes the comparison of different design pathways feasible. This presentation provides a comprehensive overview of the practical methodologies used in DTCO. We demonstrate the full simulation hierarchy, starting from the physical basis up to the circuit level extraction of target figures of merit. The presented workflow seamlessly integrates TCAD and SPICE simulations to achieve fast TAT for different scenarios, including performance prediction and variability. The goal is to give the participants an idea of the place of the DTCO methodology within the standard EDA design flow, featuring relevant real-world applications in technology development.