SESSION 1

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09:30 – 10:00

Breaking the Jitter Barrier: Ultra-Low-Jitter Frequency Generation in 55-nm BiCMOS for mm-Wave Systems

Salvatore Levantino (Politecnico di Milano, IT)

Within the SHIFT project, we present a frequency generation suite in 55-nm BiCMOS. The 10-12 GHz PLL core achieves record integrated jitter of 14.9 fs (integer-N) and 25.4 fs (fractional-N). This is enabled by a power-gated LC oscillator (PGO) acting as a DTC and a series-resonance DCO. A 56-76 GHz sextupler complements the PLL, featuring a digitally calibrated tripler with >40-dB fundamental rejection. These components set new benchmarks for high-spectral-purity signal generation, targeting 6G backhaul and satellite communication requirements.

 

10:00 – 10:30

Coupled-lines and their Applications in Millimeter-wave BiCMOS

Joao E. Gentil Lé (University Grenoble Alpes, FR; FHNW, CH)

As wireless systems push for higher data rates using millimeter-wave frequencies, coupled-lines (Clines) emerge as compact, high-performance alternatives to lumped elements—yet their modeling is absent from standard Process Design Kits (PDKs). In this talk, we introduce a general modeling approach for Clines in BiCMOS technology, introducing “Clines Charts” as a design-oriented abacus. Building on this framework, we demonstrate multiple fabricated D-band (110–170 GHz) Clines-based building blocks—including couplers, matching networks, variable attenuators, switches, phase shifters, and variable power splitters—achieving state-of-the-art performance.

 

10:30 – 11:00

Multi-Antenna Transceivers Exploiting Spatial Processing.

Dominique Morche (CEA-Leti, FR)

While the carrier frequency is reaching higher mmwave, the number of required antenna elements increases, thereby impacting the complexity of the system. This, however come with some additional degree of freedom. This talk will detail how spatial processing can be exploited in multi-antenna system to relax the requirements of the transceiver building blocks. The basic principle and state of the art will be first presented. A new approach, relying of spatial shaping of the noise, will be described. The benefit on a digital beamforming transmitter with 8 antennas will be shown. Some perspectives to further exploit the approach will be drawn at the end.

 

11:00 – 11:30

Coffee break

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SESSION 2

11:30 – 12:00

Ka-band Front End Module Integration Based on SiGe and GaN Custom Chipsets.

Francesco Manni (University of Tor Vergata, IT)

The integration of front-end modules in phased arrays is increasing with LEO and NTN applications. While many silicon beamforming ICs exist, custom specifications still require dedicated MMIC developments. This work proposes a compact module integrating five MMICs within a 30 × 30 mm² footprint. It includes a 0/90° Wilkinson splitter, a SiGe vector modulator, an LNA, and a dual GaN PA delivering 27 dBm per channel. Control and monitoring are handled by a compact 5 × 5 mm² SPI-controlled chip. The module is encapsulated using a PCB carrier-grade process compatible with SMT assembly.

 

12:00 – 12:30

D-band Low-Noise-Amplifier design in 55-nm SiGe BiCMOS

Pierre-Louis Hellier (University Grenoble Alpes, FR)

MmW design in IC technologies faces challenges due to the transistors low gain and the propagation effect within the passive components. This presentation summarizes the work done on LNAs within the SHIFT project. Components modeling and measurements are described. Design metrics for LNA are introduced and a flexible workflow is proposed. LNAs developed for the project are detailed including the HBT sizing and biasing, the amplifier topology and the impedance matching strategies. Finally, the LNAs measurements are presented and discussed.

 

12:30 – 13:00

6G FR3 Power Amplifier Design considerations for mobile communications in B55X technologies

Paul Rezette (IMS Talence, Bordeaux, France).

This work covers design considerations for integrated SiGe power amplifiers in 6G FR3 phased-array systems. Regarding to the PA, a particular attention is given to performance trade-offs involving output power, efficiency, linearity, and stability in highly integrated architectures. Several SiGe PA architectures will be considered: cascade and differential PA, balanced PA, and load-modulated balanced amplifier (LMBA). This talk will also cover the amplitude and phase control to give an overview of the SiGe BFIC performances. Simulations and measurement results will be presented.

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